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VLSISP
2010
205views more  VLSISP 2010»
15 years 6 months ago
Adaptable, Fast, Area-Efficient Architecture for Logarithm Approximation with Arbitrary Accuracy on FPGA
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...
Dimitris G. Bariamis, Dimitris Maroulis, Dimitrios...
ACSAC
2010
IEEE
15 years 5 months ago
A framework for testing hardware-software security architectures
New security architectures are difficult to prototype and test at the design stage. Fine-grained monitoring of the interactions between hardware, the operating system, and applica...
Jeffrey S. Dwoskin, Mahadevan Gomathisankaran, Yu-...
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IPPS
2010
IEEE
15 years 5 months ago
Tile QR factorization with parallel panel processing for multicore architectures
To exploit the potential of multicore architectures, recent dense linear algebra libraries have used tile algorithms, which consist in scheduling a Directed Acyclic Graph (DAG) of...
Bilel Hadri, Hatem Ltaief, Emmanuel Agullo, Jack D...
KBSE
2010
IEEE
15 years 5 months ago
Kadre: domain-specific architectural recovery for scientific software systems
Scientists today conduct new research via software-based experimentation and validation in a host of disciplines, including materials science, life sciences, astronomy, and physic...
David Woollard, Chris Mattmann, Daniel Popescu, Ne...
ERSA
2009
185views Hardware» more  ERSA 2009»
15 years 5 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl