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ISCAPDCS
2001
15 years 8 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
SIES
2009
IEEE
16 years 1 months ago
A modular fast simulation framework for stream-oriented MPSoC
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...
ICCD
2000
IEEE
103views Hardware» more  ICCD 2000»
16 years 3 months ago
Efficient Place and Route for Pipeline Reconfigurable Architectures
In this paper, we present a fast and eficient compilation methodology for pipeline reconfigurable architectures. Our compiler back-end is much faster than conventional CAD tools, ...
Srihari Cadambi, Seth Copen Goldstein
ECBS
2007
IEEE
135views Hardware» more  ECBS 2007»
16 years 1 months ago
Introducing Impact Analysis for Architectural Decisions
Architectural quality constitutes a critical factor for contemporary software systems, especially because of their size and the needs for frequent, quick changes. For success-crit...
Matthias Riebisch, Sven Wohlfarth
GLOBECOM
2007
IEEE
16 years 1 months ago
Distributed Control Plane for 4D Architecture
—We explore the design of a logically centralized but physically distributed control plane for 4D architecture. 4D architecture proposes centralization of network-wide decision m...
Hammad Iqbal, Taieb Znati