The design of state-of-the-art, complex embedded systems requires the capability of modeling and simulating the complex networked environment in which such systems operate. This i...
Franco Fummi, Giovanni Perbellini, Paolo Gallo, Ma...
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
Based on the limitations raised by existing approaches in the context of the Semantic Web, we propose a formalism, Web Sources Global Ontology (WebSOGO), a data meta-model for the...
Model checking is an automated technique for verifying that a system satisfies a set of required properties. Such properties are typically expressed as temporal logic formulas, in...
We present an approach towards a formal dynamic semantics for UML using ASM. We aim to remain as close as possible to the standard definition of UML and to cover the operational pa...