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DAC
1999
ACM
16 years 8 months ago
Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications
The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, ...
210
Voted
DAC
2004
ACM
16 years 8 months ago
Profile-guided microarchitectural floorplanning for deep submicron processor design
As process technology migrates to deep submicron with feature size less than 100nm, global wire delay is becoming a major hindrance in keeping the latency of intra-chip communicat...
Mongkol Ekpanyapong, Jacob R. Minz, Thaisiri Watew...
147
Voted
DAC
2005
ACM
16 years 8 months ago
Variations-aware low-power design with voltage scaling
We present a new methodology which takes into consideration the effect of Within-Die (WID) process variations on a low-voltage parallel system. We show that in the presence of pro...
Navid Azizi, Muhammad M. Khellah, Vivek De, Farid ...
207
Voted
DAC
2006
ACM
16 years 8 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
244
Voted
DOLAP
2006
ACM
16 years 1 months ago
Designing ETL processes using semantic web technologies
One of the most important tasks performed in the early stages of a data warehouse project is the analysis of the structure and content of the existing data sources and their inten...
Dimitrios Skoutas, Alkis Simitsis