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ANCS
2007
ACM
15 years 11 months ago
Congestion management for non-blocking clos networks
We propose a distributed congestion management scheme for non-blocking, 3-stage Clos networks, comprising plain buffered crossbar switches. VOQ requests are routed using multipath...
Nikolaos Chrysos
221
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KDD
2010
ACM
228views Data Mining» more  KDD 2010»
15 years 11 months ago
The new iris data: modular data generators
In this paper we introduce a modular, highly flexible, opensource environment for data generation. Using an existing graphical data flow tool, the user can combine various types...
Iris Adä, Michael R. Berthold
FPL
2007
Springer
97views Hardware» more  FPL 2007»
15 years 11 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
232
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CASES
2006
ACM
15 years 11 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 11 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt