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ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 11 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
EXACT
2007
15 years 10 months ago
Learning Models from Temporal-Logic Properties via Explanations
Given a model and a property expressed in temporal logic, a model checker normally produces a counterexample in case the model does not satisfy the property. This counterexample i...
Miguel A. Carrillo, David A. Rosenblueth
CSL
2008
Springer
15 years 9 months ago
A Characterization of Hypercoherent Semantic Correctness in Multiplicative Additive Linear Logic
We give a graph theoretical criterion on multiplicative additive linear logic (MALL) cut-free proof structures that exactly characterizes those whose interpretation is a hypercliqu...
Paolo Tranquilli
CLIMA
2004
15 years 9 months ago
The Apriori Stochastic Dependency Detection (ASDD) Algorithm for Learning Stochastic Logic Rules
Apriori Stochastic Dependency Detection (ASDD) is an algorithm for fast induction of stochastic logic rules from a database of observations made by an agent situated in an environm...
Christopher Child, Kostas Stathis
CLIMA
2004
15 years 9 months ago
Dynamic Logic Programming: Various Semantics Are Equal on Acyclic Programs
Abstract. Multidimensional dynamic logic programs (MDLPs) are suitable to represent knowledge dynamic in time, or more generally, information coming from various sources, partially...
Martin Homola