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ICCAD
1997
IEEE
131views Hardware» more  ICCAD 1997»
15 years 10 months ago
COSMOS: a continuous optimization approach for maximum power estimation of CMOS circuits
Maximum instantaneous power in VLSI circuits has a great impact on circuit's reliability and the design of power and ground lines. To synthesizehighlyreliablesystems,accurate...
Chuan-Yu Wang, Kaushik Roy
TVLSI
1998
81views more  TVLSI 1998»
15 years 6 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to ef...
Chuan-Yu Wang, Kaushik Roy
153
Voted
DATE
1998
IEEE
93views Hardware» more  DATE 1998»
15 years 10 months ago
Exact and Approximate Estimation for Maximum Instantaneous Current of CMOS Circuits
We present an integer-linear-programming-based approach for estimating the maximum instantaneous current through the power supply lines for CMOS circuits. It produces the exact so...
Yi-Min Jiang, Kwang-Ting Cheng
TIM
2010
294views Education» more  TIM 2010»
15 years 1 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi
MJ
2007
87views more  MJ 2007»
15 years 5 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul