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» Challenges in Embedded Memory Design and Test
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CASES
2007
ACM
15 years 10 months ago
Fragment cache management for dynamic binary translators in embedded systems with scratchpad
Dynamic binary translation (DBT) has been used to achieve numerous goals (e.g., better performance) for general-purpose computers. Recently, DBT has also attracted attention for e...
José Baiocchi, Bruce R. Childers, Jack W. D...
CODES
2008
IEEE
15 years 8 months ago
A time-predictable system initialization design for huge-capacity flash-memory storage systems
The capacity of flash-memory storage systems grows at a speed similar to many other storage systems. In order to properly manage the product cost, vendors face serious challenges ...
Chin-Hsien Wu
DATE
2006
IEEE
116views Hardware» more  DATE 2006»
16 years 13 days ago
Adaptive data placement in an embedded multiprocessor thread library
— Embedded multiprocessors pose new challenges in the design and implementation of embedded software. This has led to the need for programming interfaces that expose the capabili...
Phillip Stanley-Marbell, Kanishka Lahiri, Anand Ra...
GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
16 years 13 days ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra
ITC
2003
IEEE
168views Hardware» more  ITC 2003»
15 years 11 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...