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ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
16 years 1 months ago
Circuit-level mismatch modelling and yield optimization for CMOS analog circuits
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
Mingjing Chen, Alex Orailoglu
CN
1998
66views more  CN 1998»
15 years 6 months ago
Route Servers for Inter-Domain Routing
Internet transmission and switching facilities are partitioned into different administrative domains. To effect routing between domains, domain border routers establish pairwise p...
Ramesh Govindan, Cengiz Alaettinoglu, Kannan Varad...
ISSRE
2007
IEEE
15 years 8 months ago
Fault Prediction using Early Lifecycle Data
The prediction of fault-prone modules in a software project has been the topic of many studies. In this paper, we investigate whether metrics available early in the development li...
Yue Jiang, Bojan Cukic, Tim Menzies
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
16 years 14 days ago
An ILP Formulation for Reliability-Oriented High-Level Synthesis
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Er...
DAC
2005
ACM
16 years 7 months ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...