3395 search results - page 154 / 679 » Circuit-aware architectural simulation |
177
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IMR
2003
Springer
16 years 5 days ago
2003
Springer
Unstructured mesh adaptation has already revealed very efficient for computing an accurate solution in a reasonnable amount of time on current PC architectures. Two features are s...
202
Voted
ISCAS
2003
IEEE
16 years 7 days ago
2003
IEEE
A massively scalable architecture for decoding low-density parity-check codes is presented in this paper. This novel architecture uses hardware scaling and memory partitioning to ...
177
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APCSAC
2006
IEEE
16 years 1 months ago
2006
IEEE
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
170
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PADS
2006
ACM
16 years 28 days ago
2006
ACM
The High Level Architecture (HLA) is a standard for the interoperability and reuse of simulation components, referred to as federates. Large scale HLA-compliant simulations are bu...
213
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PADS
2005
ACM
16 years 16 days ago
2005
ACM
ct This paper provides an overview of the WarpIV Simulation Kernel that was designed to be an initial implementation of the Standard Simulation Architecture (SSA). WarpIV is the ne...