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ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
15 years 5 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...
RSA
2008
80views more  RSA 2008»
15 years 5 months ago
The persistent-access-caching algorithm
ABSTRACT: Caching is widely recognized as an effective mechanism for improving the performance of the World Wide Web. One of the key components in engineering the Web caching syste...
Predrag R. Jelenkovic, Ana Radovanovic
RTS
2008
134views more  RTS 2008»
15 years 5 months ago
On earliest deadline first scheduling for temporal consistency maintenance
A real-time object is one whose state may become invalid with the passage of time. A temporal validity interval is associated with the object state, and the real-time object is te...
Ming Xiong, Qiong Wang, Krithi Ramamritham
ISPDC
2010
IEEE
15 years 5 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
ISSRE
2010
IEEE
15 years 5 months ago
The Impact of Coupling on the Fault-Proneness of Aspect-Oriented Programs: An Empirical Study
—Coupling in software applications is often used as an indicator of external quality attributes such as fault-proneness. In fact, the correlation of coupling metrics and faults i...
Rachel Burrows, Fabiano Cutigi Ferrari, Otá...
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