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» Compiler Architectures for Heterogeneous Systems
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DAC
2009
ACM
16 years 7 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong
DAC
2007
ACM
16 years 7 months ago
Chip Multi-Processor Generator
The drive for low-power, high performance computation coupled with the extremely high design costs for ASIC designs, has driven a number of designers to try to create a flexible, ...
Alex Solomatnikov, Amin Firoozshahian, Wajahat Qad...
DAC
2006
ACM
16 years 7 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
SP
2009
IEEE
144views Security Privacy» more  SP 2009»
16 years 1 months ago
Native Client: A Sandbox for Portable, Untrusted x86 Native Code
This paper describes the design, implementation and evaluation of Native Client, a sandbox for untrusted x86 native code. Native Client aims to give browser-based applications the...
Bennet Yee, David Sehr, Gregory Dardyk, J. Bradley...
IPPS
2009
IEEE
16 years 1 months ago
Scalable RDMA performance in PGAS languages
Partitioned Global Address Space (PGAS) languages provide a unique programming model that can span shared-memory multiprocessor (SMP) architectures, distributed memory machines, o...
Montse Farreras, George Almási, Calin Casca...