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» Compiler Technology for Two Novel Computer Architectures
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177
Voted
SAC
2009
ACM
16 years 1 months ago
Celling SHIM: compiling deterministic concurrency to a heterogeneous multicore
Parallel architectures are the way of the future, but are notoriously difficult to program. In addition to the low-level constructs they often present (e.g., locks, DMA, and non-...
Nalini Vasudevan, Stephen A. Edwards
134
Voted
DAC
1997
ACM
15 years 10 months ago
CLIP: An Optimizing Layout Generator for Two-Dimensional CMOS Cells
We present a novel technique CLIP for optimizing both the height and width of CMOS cell layouts in the two-dimensional (2D) style. CLIP is based on integer-linear programming (ILP...
Avaneendra Gupta, John P. Hayes
177
Voted
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
15 years 12 months ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
232
Voted
AINA
2010
IEEE
14 years 10 months ago
A Novel Cross Layer Intrusion Detection System in MANET
— Intrusion detection System forms a vital component of internet security. To keep pace with the growing trends, there is a critical need to replace single layer detection techno...
Rakesh Shrestha, Kyong-Heon Han, Dong-You Choi, Se...
144
Voted
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 11 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...