1133 search results - page 97 / 227 » Compiling for Speculative Architectures |
169
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ISCA
1998
IEEE
15 years 11 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
194
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
173
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ASAP
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
193
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SIGCOMM
2010
ACM
15 years 7 months ago
2010
ACM
We describe Currawong, a tool to perform system software architecture optimisation. Currawong is an extensible tool which applies optimisations at the point where an application i...
165
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IEEEPACT
2007
IEEE
16 years 1 months ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...