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    VLSID
    2006
    IEEE
    103views VLSI» more  VLSID 2006»
    A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator
    16 years 7 months ago
    A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator
    Download  ic.ncue.edu.tw
    Jun Chen, Rong Luo, Huazhong Yang, Hui Wang
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    VLSID
    2005
    IEEE
    108views VLSI» more  VLSID 2005»
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    16 years 7 months ago
    Design of a Low Power Image Watermarking Encoder Using Dual Voltage and Frequency
    Download  www.cse.unt.edu
    Saraju P. Mohanty, N. Ranganathan, K. Balakrishnan
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    VLSID
    2004
    IEEE
    89views VLSI» more  VLSID 2004»
    Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment
    16 years 7 months ago
    Response Surface Modeling of 100nm CMOS Process Technology using Design of Experiment
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    H. C. Srinivasaiah, Navakanta Bhat
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    VLSID
    2002
    IEEE
    110views VLSI» more  VLSID 2002»
    Automatic Synthesis of CMOS Operational Amplifiers: A Fuzzy Optimization Approach
    16 years 7 months ago
    Automatic Synthesis of CMOS Operational Amplifiers: A Fuzzy Optimization Approach
    Download  www.cs.york.ac.uk
    Biranchinath Sahu, Aloke K. Dutta
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    VLSID
    2001
    IEEE
    82views VLSI» more  VLSID 2001»
    High Level Synthesis Of Multi-Precision Data Flow Graphs
    16 years 7 months ago
    High Level Synthesis Of Multi-Precision Data Flow Graphs
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    Vikas Agrawal, Anand Pande, Mahesh Mehendale
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