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DAC
1996
ACM
15 years 11 months ago
Innovative Verification Strategy Reduces Design Cycle Time for High-End Sparc Processor
Superscalar processor developers are creatively leveraging best-in-class design verification tools to meet narrow market windows. Accelerated simulation is especially useful owing...
Val Popescu, Bill McNamara
DAC
2006
ACM
16 years 8 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
CHI
2009
ACM
16 years 8 months ago
DICE: designing conference rooms for usability
One of the core challenges now facing smart rooms is supporting realistic, everyday activities. While much research has been done to push forward the frontiers of novel interactio...
Gene Golovchinsky, Pernilla Qvarfordt, Bill van Me...
CHI
2008
ACM
16 years 8 months ago
A resource kit for participatory socio-technical design in rural Kenya
We describe our approach and initial results in the participatory design of technology relevant to local rural livelihoods. Our approach to design and usability proceeds from rese...
Kevin Walker, Joshua Underwood, Timothy Mwololo Wa...
CHI
2003
ACM
16 years 8 months ago
A spatially-aware tangible interface for computer-aided design
This paper presents a Computer-Aided Design (CAD) platform for designers to navigate and construct 3D model intuitively through Tangible User Interfaces (TUIs). We suggest that 3D...
Lee Chia-Hsun, Ma Yu-Pin, Jeng Taysheng