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POPL
2010
ACM
16 years 4 months ago
Generating Compiler Optimizations from Proofs
We present an automated technique for generating compiler optimizations from examples of concrete programs before and after improvements have been made to them. The key technical ...
Ross Tate, Michael Stepp, Sorin Lerner
SDM
2009
SIAM
180views Data Mining» more  SDM 2009»
16 years 4 months ago
Hierarchical Linear Discriminant Analysis for Beamforming.
This paper demonstrates the applicability of the recently proposed supervised dimension reduction, hierarchical linear discriminant analysis (h-LDA) to a well-known spatial locali...
Barry L. Drake, Haesun Park, Jaegul Choo
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
16 years 4 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 4 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICCAD
2002
IEEE
124views Hardware» more  ICCAD 2002»
16 years 4 months ago
Symbolic pointer analysis
— One of the bottlenecks in the recent movement of hardware synthesis from behavioral C programs is the difficulty in reasoning about runtime pointer values at compile time. The...
Jianwen Zhu
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