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DATE
2009
IEEE
113views Hardware» more  DATE 2009»
16 years 1 months ago
System-level process variability analysis and mitigation for 3D MPSoCs
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
Siddharth Garg, Diana Marculescu
DATE
2007
IEEE
92views Hardware» more  DATE 2007»
16 years 1 months ago
Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware
Cryptographic embedded systems are vulnerable to Differential Power Analysis (DPA) attacks. In this paper, we propose a logic design style, called as Precharge Masked Reed-Muller ...
Kuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Ch...
EXPERT
2002
129views more  EXPERT 2002»
15 years 6 months ago
Modeling and Simulating Work Practice: A Method for Work Systems Design
er than abstracting human behavior as work processes or tasks--functional idealizations of the work to be accomplished--we model people's activities comprehensively and chrono...
Maarten Sierhuis, William J. Clancey
WSC
2004
15 years 8 months ago
Two-Step 3-Dimensional Sketching Tool for New Product Development
This paper discusses a two-step virtual reality based conceptual design tool that enables industrial designers to create sketches of their ideas in 3-dimensional space in real tim...
Ali Akgunduz, Hang Yu
CODES
2001
IEEE
15 years 10 months ago
System canvas: a new design environment for embedded DSP and telecommunication systems
We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specif...
Praveen K. Murthy, Etan G. Cohen, Steve Rowland