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2010
ACM
170views Algorithms» more  STOC 2010»
15 years 11 months ago
Connectivity oracles for failure prone graphs
Dynamic graph connectivity algorithms have been studied for many years, but typically in the most general possible setting, where the graph can evolve in completely arbitrary ways...
Ran Duan, Seth Pettie
ISCA
2010
IEEE
176views Hardware» more  ISCA 2010»
15 years 11 months ago
Forwardflow: a scalable core for power-constrained CMPs
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
Dan Gibson, David A. Wood
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
15 years 11 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez
PADS
1999
ACM
15 years 11 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
EH
1999
IEEE
169views Hardware» more  EH 1999»
15 years 11 months ago
GeneticFPGA: Evolving Stable Circuits on Mainstream FPGA Devices
GeneticFPGA is a Java-based tool for evolving digital circuits on Xilinx XC4000EXTM and XC4000XLTM devices. Unlike other FPGA architectures popular with Evolutionary Hardware rese...
Delon Levi, Steve Guccione
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