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ISCAS
2006
IEEE
100views Hardware» more  ISCAS 2006»
16 years 1 months ago
Power system on a chip (PSoC)
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
Chika O. Nwankpa, A. S. Deese, Qingyan Liu, Aaron ...
ISORC
2006
IEEE
16 years 1 months ago
From UML/SPT Models to Schedulability Analysis: a Metamodel-Based Transformation
UML through its profiling mechanism is well adapted for the modeling of real-time software requirements and designs. It is becoming the de facto standard. On the other hand, seve...
Abdelouahed Gherbi, Ferhat Khendek
ISORC
2006
IEEE
16 years 1 months ago
Looking Ahead in Open Multithreaded Transactions
Open multithreaded transactions constitute building blocks that allow a developer to design and structure the execution of complex distributed systems featuring cooperative and co...
Maxime Monod, Jörg Kienzle, Alexander Romanov...
IWNAS
2006
IEEE
16 years 1 months ago
A Fast Read/Write Process to Reduce RDMA Communication Latency
RDMA reduces network latency by eliminating unnecessary copies from network interface cards to application buffers, but how to reduce memory registration cost is a challenge. Prev...
Li Ou, Jizhong Han
JVA
2006
IEEE
16 years 1 months ago
Features of Future Network Processor Architectures
As network applications are becoming increasingly sophisticated and internet traffic is getting heavier, future network processors must continue processing computation-intensive ...
Kyueun Yi, Jean-Luc Gaudiot