Sciweavers

434 search results - page 42 / 87
» Design Methodologies and Architecture Solutions for High-Per...
Sort
View
VLSID
2000
IEEE
135views VLSI» more  VLSID 2000»
15 years 10 months ago
Performance and Functional Verification of Microprocessors
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...
Pradip Bose, Jacob A. Abraham
RE
2009
Springer
16 years 1 months ago
[vem: xi: ] - A Methodology for Process Based Requirements Engineering
Service-oriented architectures (SOA) aim at the alignment of business and IT by having a clear business process-centric focus. In order to reach that goal, real-world business pro...
Philipp Liegl, Rainer Schuster, Marco Zapletal, Ch...
IPPS
2006
IEEE
16 years 17 days ago
A high level SoC power estimation based on IP modeling
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...
David Elléouet, Nathalie Julien, Dominique ...
ASPDAC
2012
ACM
290views Hardware» more  ASPDAC 2012»
14 years 2 months ago
CODA: A concurrent online delay measurement architecture for critical paths
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive desi...
Yubin Zhang, Haile Yu, Qiang Xu
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
15 years 11 months ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood