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DAC
2005
ACM
16 years 8 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
16 years 8 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
DATE
2006
IEEE
101views Hardware» more  DATE 2006»
16 years 1 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
CASCON
1996
77views Education» more  CASCON 1996»
15 years 9 months ago
Harvesting design for an application framework
Framework design begins with domain analysis. Either the problem domain is analyzed to create a new design, or the solution domain is analyzed to understand how the problem has al...
Joan Boone
SOSP
1993
ACM
15 years 9 months ago
Improving IPC by Kernel Design
Inter-process communication (ipc) has to be fast and e ective, otherwise programmers will not use remote procedure calls(RPC),multithreadingand multitasking adequately. Thus ipc p...
Jochen Liedtke