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» Design and implementation of network puzzles
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230
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MICRO
2008
IEEE
113views Hardware» more  MICRO 2008»
16 years 1 months ago
From SODA to scotch: The evolution of a wireless baseband processor
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, ...
178
Voted
CODES
2007
IEEE
16 years 1 months ago
Predator: a predictable SDRAM memory controller
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
Benny Akesson, Kees Goossens, Markus Ringhofer
190
Voted
CCS
2005
ACM
16 years 15 days ago
CPOL: high-performance policy evaluation
Policy enforcement is an integral part of many applications. Policies are often used to control access to sensitive information. Current policy specification languages give users ...
Kevin Borders, Xin Zhao, Atul Prakash
311
Voted
FPGA
2011
ACM
393views FPGA» more  FPGA 2011»
14 years 10 months ago
Comparing FPGA vs. custom cmos and the impact on processor microarchitecture
As soft processors are increasingly used in diverse applications, there is a need to evolve their microarchitectures in a way that suits the FPGA implementation substrate. This pa...
Henry Wong, Vaughn Betz, Jonathan Rose
CCO
2001
Springer
161views Combinatorics» more  CCO 2001»
15 years 11 months ago
Branch, Cut, and Price: Sequential and Parallel
Branch, cut, and price (BCP) is an LP-based branch and bound technique for solving large-scale discrete optimization problems (DOPs). In BCP, both cuts and variables can be generat...
Laszlo Ladányi, Ted K. Ralphs, Leslie E. Tr...