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DAC
2007
ACM
16 years 7 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
ER
1999
Springer
196views Database» more  ER 1999»
15 years 11 months ago
A Process-Integrated Conceptual Design Environment for Chemical Engineering
Abstract. The process industries (chemicals, food, oil, ...) are characterized by - continuous or batch -- processes of material transformation. The design of such processes, and t...
Matthias Jarke, Thomas List, Klaus Weidenhaupt
CCS
2011
ACM
14 years 6 months ago
SURF: detecting and measuring search poisoning
Search engine optimization (SEO) techniques are often abused to promote websites among search results. This is a practice known as blackhat SEO. In this paper we tackle a newly em...
Long Lu, Roberto Perdisci, Wenke Lee
ISORC
1998
IEEE
15 years 11 months ago
The Time-Triggered Architecture
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
Hermann Kopetz
SUTC
2006
IEEE
16 years 18 days ago
Detection and Repair of Software Errors in Hierarchical Sensor Networks
Abstract— Sensor networks are being increasingly deployed for collecting critical data in various applications. Once deployed, a sensor network may experience faults at the indiv...
Douglas Herbert, Yung-Hsiang Lu, Saurabh Bagchi, Z...