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» Design of Neuromorphic Hardwares
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ISWC
2002
IEEE
15 years 11 months ago
Micro-Accelerometer Based Hardware Interfaces for Wearable Computer Mixed Reality Applications
Human interaction with wearable computers is an important research issue, especially when combined with mixed reality (MR) applications. Natural and non-obtrusive means of interac...
Adrian David Cheok, Krishnamoorthy Ganesh Kumar, S...
FPGA
2008
ACM
161views FPGA» more  FPGA 2008»
15 years 8 months ago
Implementing high-speed string matching hardware for network intrusion detection systems
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning ...
SUTC
2010
IEEE
15 years 5 months ago
Hardware Implementation of Symbol Synchronization for Underwater FSK
—— Symbol synchronization is a critical component in the design of an underwater acoustic modem. Without accurate symbol synchronization, higher bit error rates incur thus reduc...
Ying Li, Xing Zhang, Bridget Benson, Ryan Kastner
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
16 years 1 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
ICCAD
2009
IEEE
94views Hardware» more  ICCAD 2009»
15 years 4 months ago
Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint
We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. ...