Sciweavers

12714 search results - page 239 / 2543
» Designing Data Warehouses
Sort
View
ICCD
1995
IEEE
85views Hardware» more  ICCD 1995»
15 years 10 months ago
A high-performance asynchronous SCSI controller
We describe thedesign of a high performance asynchronous SCSI Small Computer Systems Interface controller data path and the associated control circuits. The data path is an asyn...
Kenneth Y. Yun, David L. Dill
TVCG
2012
167views Hardware» more  TVCG 2012»
13 years 9 months ago
Wellformedness Properties in Euler Diagrams: Which Should Be Used?
— Euler diagrams are often used to visualize intersecting data sets in applications such as criminology; genetics, medicine and computer file systems. One interesting aspect of t...
Peter Rodgers, Leishi Zhang, Helen C. Purchase
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
16 years 24 days ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Design space exploration for a coarse grain accelerator
- In the design process of a reconfigurable accelerator employing in an embedded system, multitude parameters may result in remarkable complexity and a large design space. Design s...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...
FPL
2009
Springer
117views Hardware» more  FPL 2009»
15 years 12 months ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...