In this paper we describe a complete design methodology for a globally asynchronous onchip communication network connecting both locally-synchronous and asynchronous modules. Sync...
Jens Muttersbach, Thomas Villiger, Wolfgang Fichtn...
This paper proposes a novel method to estimate and to reduce redundant power of synchronous circuits at RT level design. Because much redundant power is caused by redundant clocki...
We describe the design and implementation of a legal text database. The database of provides a number of Greek Council of State decisions in the form of a computer-accessible mediu...
We propose in this paper a new voting scheme where the voter, while receiving a receipt for his/her vote allowing further contestations, cannot use it to reveal the vote to other u...
This paper presents results from the analysis of data collected during a 3-year user-oriented longitudinal and empirical on-line evaluation of the use of the Dublin Core metadata ...