11242 search results - page 328 / 2249 » Designing a Super-Peer Network |
202
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DATE
2010
IEEE
16 years 21 days ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
175
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DAC
1998
ACM
16 years 8 months ago
1998
ACM
Increasing size and geographical separation of design data and teams has created a need for a network-based electronic design environment that is scaleable, adaptable, secure, hig...
197
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ICCAD
2003
IEEE
16 years 4 months ago
2003
IEEE
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
151
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WCNC
2008
IEEE
16 years 2 months ago
2008
IEEE
— In this paper we demonstrate that our ability to match the EXtrinsic Information Transfer (EXIT) function of an Irregular Variable Length Code (IrVLC) to that of a seriallyconc...
168
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ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...