2945 search results - page 180 / 589 » Designing and Implementing Malicious Hardware |
203
click to vote
SIPS
2006
IEEE
16 years 1 months ago
2006
IEEE
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
199
Voted
FDL
2005
IEEE
16 years 19 days ago
2005
IEEE
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
144
click to vote
DDECS
2006
IEEE
16 years 1 months ago
2006
IEEE
Abstract— In this paper, we describe a system for transforming a code given in ANSI C into an equivalent SystemC description. In order to synthesize parallel C codes into hardwar...
162
click to vote
DAC
2005
ACM
15 years 9 months ago
2005
ACM
This paper presents an efficient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory e...
188
Voted
IWNAS
2008
IEEE
16 years 1 months ago
2008
IEEE
∗ As one type of stealthy and hard-to-detect attack, lowrate TCP-targeted DDoS attack can seriously throttle the throughput of normal TCP flows for a long time without being noti...