2945 search results - page 413 / 589 » Designing and Implementing Malicious Hardware |
185
Voted
FCCM
2009
IEEE
16 years 1 months ago
2009
IEEE
—Single-FPGA spatial implementations can provide an order of magnitude speedup over sequential microprocessor implementations for data-parallel, floating-point computation in SP...
176
Voted
IPPS
2009
IEEE
16 years 1 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
191
Voted
FCCM
2007
IEEE
16 years 1 months ago
2007
IEEE
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
222
Voted
IPPS
2006
IEEE
16 years 1 months ago
2006
IEEE
Because of the growing use of multimedia content over Internet, Content-Based Image Retrieval (CBIR) has recently received a lot of interest. While accurate search techniques base...
152
click to vote
ISCAS
2006
IEEE
16 years 1 months ago
2006
IEEE
—In [1], we have shown that it is feasible to design filters with arbitrary waveform responses and therefore we propose an ultra-wideband pulse generator incorporating a filter w...