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TCAD
2010
97views more  TCAD 2010»
15 years 2 months ago
Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
TMM
2010
152views Management» more  TMM 2010»
15 years 2 months ago
Network Awareness of P2P Live Streaming Applications: A Measurement Study
Abstract--Early P2P-TV systems have already attracted millions of users, and many new commercial solutions are entering this market. Little information is however available about h...
Delia Ciullo, M.-A. Garcia da Rocha Neta, Á...
TVCG
2010
165views more  TVCG 2010»
15 years 2 months ago
Binary Mesh Partitioning for Cache-Efficient Visualization
Abstract--One important bottleneck when visualizing large data sets is the data transfer between processor and memory. Cacheaware (CA) and cache-oblivious (CO) algorithms take into...
Marc Tchiboukdjian, Vincent Danjean, Bruno Raffin
TWC
2010
15 years 2 months ago
Pi: a practical incentive protocol for delay tolerant networks
Delay Tolerant Networks (DTNs) are a class of networks characterized by lack of guaranteed connectivity, typically low frequency of encounters between DTN nodes and long propagatio...
Rongxing Lu, Xiaodong Lin, Haojin Zhu, Xuemin Shen...
CORR
2011
Springer
160views Education» more  CORR 2011»
14 years 11 months ago
Searching for Bayesian Network Structures in the Space of Restricted Acyclic Partially Directed Graphs
Although many algorithms have been designed to construct Bayesian network structures using different approaches and principles, they all employ only two methods: those based on i...
Silvia Acid, Luis M. de Campos