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» Diagonal routing in high performance microprocessor design
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DAC
2011
ACM
14 years 6 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
15 years 12 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
ASPDAC
2006
ACM
115views Hardware» more  ASPDAC 2006»
16 years 17 days ago
DraXRouter: global routing in X-Architecture with dynamic resource assignment
In recent years, the X-Architecture is introduced to obtain better performance for integrated circuit physical design. This paper reformulates the global routing problem in X-Archi...
Zhen Cao, Tong Jing, Yu Hu, Yiyu Shi, Xianlong Hon...
AINA
2004
IEEE
15 years 10 months ago
On the Performance of Heuristic H MCOP for Multi-Constrained Optimal-Path QoS Routing
Network services for finding a feasible or an optimal path subject to multiple constraints on performance metrics such as delay, jitter, loss probability, etc. give rise to multip...
Gang Feng
HPCA
2011
IEEE
14 years 10 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...