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175
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DAC
1996
ACM
15 years 11 months ago
Glitch Analysis and Reduction in Register Transfer Level
: We presentdesign-for-low-power techniques based on glitch reduction for register-transfer level circuits. We analyze the generation and propagation of glitches in both the contro...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
183
Voted
SIGMETRICS
2004
ACM
127views Hardware» more  SIGMETRICS 2004»
16 years 11 days ago
Performance analysis of LAS-based scheduling disciplines in a packet switched network
The Least Attained Service (LAS) scheduling policy, when used for scheduling packets over the bottleneck link of an Internet path, can greatly reduce the average flow time for sh...
Idris A. Rai, Guillaume Urvoy-Keller, Mary K. Vern...
CORR
2010
Springer
165views Education» more  CORR 2010»
15 years 7 months ago
Performance Analysis of a 60 GHz Near Gigabit System for WPAN Applications
A 60 GHz wireless Gigabit Ethernet (G.E.) communication system capable of near gigabit data rate has been developed at IETR. The realized system covers 2 GHz available bandwidth. T...
Lahatra Rakotondrainibe, Yvan Kokar, Gheorghe Zaha...
BMCBI
2011
15 years 2 months ago
The impact of quantitative optimization of hybridization conditions on gene expression analysis
Background: With the growing availability of entire genome sequences, an increasing number of scientists can exploit oligonucleotide microarrays for genome-scale expression studie...
Peter Sykacek, David P. Kreil, Lisa A. Meadows, Ri...
BMCBI
2006
82views more  BMCBI 2006»
15 years 7 months ago
Prediction of a key role of motifs binding E2F and NR2F in down-regulation of numerous genes during the development of the mouse
Background: We previously demonstrated that gene expression profiles during neuronal differentiation in vitro and hippocampal development in vivo were very similar, due to a conse...
Michal Dabrowski, Stein Aerts, Bozena Kaminska