Sciweavers

27354 search results - page 416 / 5471
» Distributed And Parallel Computing
Sort
View
180
Voted
ASAP
2009
IEEE
95views Hardware» more  ASAP 2009»
16 years 17 days ago
A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification
Weirong Jiang, Viktor K. Prasanna
255
Voted
PARELEC
2000
IEEE
15 years 11 months ago
Parallel Computing Environments and Methods
Recent advances in high-speed networks, rapid improvements in microprocessor design, and availability of highly performing clustering software implementations enables cost-effecti...
Ghassan Fadlallah, Michel Lavoie, Louis-A. Dessain...
IPPS
1998
IEEE
15 years 11 months ago
Building BSP Programs Using the Refinement Calculus
Abstract. We extend the refinement calculus to permit the derivation of programs in the Bulk Synchronous Parallelism (BSP) style. This demonstrates that formal approaches developed...
David B. Skillicorn