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NOCS
2010
IEEE
15 years 5 months ago
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Me...
ANCS
2009
ACM
15 years 5 months ago
An adaptive hash-based multilayer scheduler for L7-filter on a highly threaded hierarchical multi-core server
Ubiquitous multi-core-based web servers and edge routers are increasingly popular in deploying computationally intensive Deep Packet Inspection (DPI) programs. Previous work has s...
Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan, Bin L...
GI
2009
Springer
15 years 5 months ago
Spontaneous and Privacy-friendly Mobile Indoor Routing and Navigation
Abstract: Mobile indoor navigation systems guide users through buildings and premises by taking into account the current position of the user and a destination such as a room, offi...
Peter Ruppel, Florian Gschwandtner
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
15 years 5 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng
CVPR
2011
IEEE
15 years 2 months ago
A Large-scale Benchmark Dataset for Event Recognition in Surveillance Video
We introduce a new large-scale video dataset designed to assess the performance of diverse visual event recognition algorithms with a focus on continuous visual event recognition ...
Sangmin Oh, Anthony Hoogs, A.G.Amitha Perera, Chia...
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