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IEEEPACT
2000
IEEE
16 years 9 hour ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
IPPS
2000
IEEE
16 years 6 hour ago
Optimal on Demand Packet Scheduling in Single-Hop Multichannel Communication Systems
In this paper, we study the problem of on demand minimum length packet scheduling in single-hop multichannel systems. Examples of these systems are those centered around switching...
Maurizio A. Bonuccelli, Susanna Pelagatti
IPPS
2000
IEEE
16 years 6 hour ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
IPPS
2000
IEEE
16 years 6 hour ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
IPPS
2000
IEEE
16 years 6 hour ago
Ordering Unstructured Meshes for Sparse Matrix Computations on Leading Parallel Systems
Abstract. Computer simulations of realistic applications usually require solving a set of non-linear partial di erential equations PDEs over a nite region. The process of obtaini...
Leonid Oliker, Xiaoye S. Li, Gerd Heber, Rupak Bis...