⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
We propose a class of alternative stochastic volatility models for electricity prices using the quantile function modeling approach. Specifically, we fit marginal distributions ...
Abstract—This paper analyzes energy characteristics of parallel algorithms executed on scalable multicore processors. Specifically, we provide a methodology for evaluating energ...
In this paper, we describe the theoretical framework that allows us to use of the expert system shell CLIPS to define the network model in the Distribution Management System (DMS)...