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HPCA
2000
IEEE
15 years 11 months ago
Impact of Heterogeneity on DSM Performance
This paper explores area/parallelism tradeo s in the design of distributed shared-memory (DSM) multiprocessors built out of large single-chip computing nodes. In this context, are...
Renato J. O. Figueiredo, José A. B. Fortes
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
15 years 11 months ago
Circuits for wide-window superscalar processors
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
Dana S. Henry, Bradley C. Kuszmaul, Gabriel H. Loh...
ASPLOS
1992
ACM
15 years 11 months ago
Non-Volatile Memory for Fast, Reliable File Systems
Given the decreasing cost of non-volatile RAM (NVRAM), by the late 1990's it will be feasible for most workstations to include a megabyte or more of NVRAM, enabling the desig...
Mary Baker, Satoshi Asami, Etienne Deprit, John K....
SIGUCCS
2000
ACM
15 years 11 months ago
Approaches to Computer Lab Management: Lockdown vs. Freedom
Basic approaches to computer lab management range along a spectrum from total lockdown of lab computers to total freedom. Total lockdown, which can be implemented with system perm...
Christopher Jones, Yasemin Tunc, Deborah Cherry
ASPLOS
2010
ACM
15 years 10 months ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...