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157
Voted
DATE
2006
IEEE
141views Hardware» more  DATE 2006»
16 years 1 months ago
Evaluating coverage of error detection logic for soft errors using formal methods
—In this paper we describe a methodology to measure exactly the quality of fault-tolerant designs by combining faultinjection in high level design (HLD) descriptions with a forma...
Udo Krautz, Matthias Pflanz, Christian Jacobi 0002...
230
Voted
FOSSACS
2007
Springer
16 years 1 months ago
Logical Reasoning for Higher-Order Functions with Local State
Abstract. We introduce an extension of Hoare logic for call-by-value higherorder functions with ML-like local reference generation. Local references may be generated dynamically an...
Nobuko Yoshida, Kohei Honda, Martin Berger
DATE
2005
IEEE
158views Hardware» more  DATE 2005»
16 years 19 days ago
Modeling and Analysis of Loading Effect in Leakage of Nano-Scaled Bulk-CMOS Logic Circuits
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
Saibal Mukhopadhyay, Swarup Bhunia, Kaushik Roy
TACAS
1998
Springer
81views Algorithms» more  TACAS 1998»
15 years 11 months ago
Formal Design and Analysis of a Gear Controller
In this paper, we report on an application of the validation and veri cation tool kit Uppaal in the design and analysis of a prototype gear controller, carried out in a joint proje...
Magnus Lindahl, Paul Pettersson, Wang Yi
222
Voted
AIA
2006
15 years 8 months ago
Speeding Up Model-based Diagnosis by a Heuristic Approach to Solving SAT
Model-based diagnosis of technical systems requires both a simulation machinery and a logic calculus. The former is responsible for the system's behavior analysis, the latter...
Benno Stein, Oliver Niggemann, Theodor Lettmann