2620 search results - page 238 / 524 » Efficient Hardware Voxelization |
171
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DFT
2003
IEEE
16 years 15 days ago
2003
IEEE
A new hybrid BIST scheme is proposed which is based on using an “incrementally guided LFSR.” It very efficiently combines external deterministic data from the tester with on-c...
162
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ISCAS
2003
IEEE
16 years 14 days ago
2003
IEEE
In modern System-on-Chip (SoC) designs verification becomes the major bottleneck. Since by using state-of-theart techniques complete designs cannot be fully formally verified, it ...
193
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ISCAS
2002
IEEE
16 years 4 days ago
2002
IEEE
This paper presents a low-cost, single-cycle floating-point unit developed for digital audio processing applications. In the unit, the serial steps of floating-point operations ar...
180
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ISQED
2002
IEEE
16 years 3 days ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
153
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ITC
2000
IEEE
15 years 11 months ago
2000
IEEE
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...