79 search results - page 13 / 16 » Efficient breadth-first manipulation of binary decision diag... |
186
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ASPDAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
173
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CHARME
2001
Springer
15 years 10 months ago
2001
Springer
Model checking is the process of verifying whether a model of a concurrent system satisfies a specified temporal property. Symbolic algorithms based on Binary Decision Diagrams (BD...
158
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RELMICS
2000
Springer
15 years 10 months ago
2000
Springer
This paper presents a novel approach to the problem of finding all subgraph isomorphisms of a (pattern) graph into another (target) graph. A relational formulation of the problem, ...
187
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ICTAI
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
155
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ICCD
2005
IEEE
16 years 3 months ago
2005
IEEE
In recent years, Boolean Satisfiability (SAT) has been shown to hold potential for Unbounded Model Checking (UMC). The success of SAT-based UMC largely relies on (i) the SAT solv...