Sciweavers

366 search results - page 14 / 74
» Evaluating the Performance of Skeleton-Based High Level Para...
Sort
View
187
Voted
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
15 years 12 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
PPOPP
2003
ACM
15 years 11 months ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
167
Voted
ASPLOS
1998
ACM
15 years 10 months ago
Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
Walter Lee, Rajeev Barua, Matthew Frank, Devabhakt...
210
Voted
FP
1992
135views Formal Methods» more  FP 1992»
15 years 10 months ago
High Level Specification of I/O in Functional Languages
The interface with the outside world has always been one of the weakest points of functional languages. It is not easy to incorporate I/O without being allowed to do side-effects....
Peter Achten, John H. G. van Groningen, Marinus J....
172
Voted
CLUSTER
2008
IEEE
16 years 25 days ago
High message rate, NIC-based atomics: Design and performance considerations
—Remote atomic memory operations are critical for achieving high-performance synchronization in tightly-coupled systems. Previous approaches to implementing atomic memory operati...
Keith D. Underwood, Michael Levenhagen, K. Scott H...