3639 search results - page 523 / 728 » Experiments on IPv6 Testing |
169
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EH
2004
IEEE
15 years 10 months ago
2004
IEEE
The work presented here tackles the problem of designing a unipolar 6-bit digital-to-analog converter (DAC) with a voltage mode output by hardware evolution. Thereby a Field Progr...
177
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CLEF
2006
Springer
15 years 10 months ago
2006
Springer
Having being proposed for the fourth time, the QA at CLEF track has confirmed a still raising interest from the research community, recording a constant increase both in the numbe...
193
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FPGA
2004
ACM
15 years 10 months ago
2004
ACM
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
198
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DAC
2006
ACM
15 years 10 months ago
2006
ACM
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying SSTA in practice today is the lack of reliable and e...
208
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DAGM
2006
Springer
15 years 10 months ago
2006
Springer
In the heart of the computer model of visual attention, an interest or saliency map is derived from an input image in a process that encompasses several data combination steps. Whi...