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    VLSID
    2005
    IEEE
    102views VLSI» more  VLSID 2005»
    Integrated On-Chip Storage Evaluation in ASIP Synthesis
    16 years 8 months ago
    Integrated On-Chip Storage Evaluation in ASIP Synthesis
    Download  www.cse.iitd.ernet.in
    An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
    Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
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    VLSID
    2005
    IEEE
    131views VLSI» more  VLSID 2005»
    Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
    16 years 8 months ago
    Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
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    Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
    Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
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    179
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    VLSID
    2004
    IEEE
    135views VLSI» more  VLSID 2004»
    Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
    16 years 8 months ago
    Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
    Download  eprints.ecs.soton.ac.uk
    Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
    M. S. Gaur, Mark Zwolinski
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    184
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    VLSID
    2003
    IEEE
    167views VLSI» more  VLSID 2003»
    Timing Minimization by Statistical Timing hMetis-based Partitioning
    16 years 8 months ago
    Timing Minimization by Statistical Timing hMetis-based Partitioning
    Download  www.eecs.berkeley.edu
    In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...
    Cristinel Ababei, Kia Bazargan
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    204
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    VLSID
    2003
    IEEE
    82views VLSI» more  VLSID 2003»
    SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs
    16 years 8 months ago
    SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs
    Download  www.cs.rpi.edu
    We propose a non-intrusive methodology for concurrent fault detection in FSMs. The proposed method is similar to duplication, wherein a replica of the circuit acts as a predictor ...
    Petros Drineas, Yiorgos Makris
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