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WOWMOM
2006
ACM
109views Multimedia» more  WOWMOM 2006»
16 years 1 months ago
Selective Channel Feedback Mechanisms for Wireless Multichannel Scheduling
Opportunistic scheduling can significantly improve wireless network performance by exploiting the feedback information that conveys the underlying channel condition. In emerging ...
Young-June Choi, Saewoong Bahk
APCSAC
2005
IEEE
16 years 1 months ago
Energy-Effective Instruction Fetch Unit for Wide Issue Processors
Continuing advances in semiconductor technology and demand for higher performance will lead to more powerful, superpipelined and wider issue processors. Instruction caches in such ...
Juan L. Aragón, Alexander V. Veidenbaum
ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
16 years 1 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
ASYNC
2005
IEEE
174views Hardware» more  ASYNC 2005»
16 years 1 months ago
Delay Insensitive Encoding and Power Analysis: A Balancing Act
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...
CGO
2005
IEEE
16 years 1 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein