This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
Maya Gokhale, Paul Graham, Michael J. Wirthlin, Da...
Abstract. The memory hierarchy plays an essential role in the performance of current computers, thus good analysis tools that help predict and understand its behavior are required....
Diego Andrade, Manuel Arenaz, Basilio B. Fraguela,...
We propose in this paper a distributed packed storage format that exploits the symmetry or the triangular structure of a dense matrix. This format stores only half of the matrix w...
Marc Baboulin, Luc Giraud, Serge Gratton, Julien L...
Anonymity is a very important security feature in addition to authentication and key agreement features in communication protocols. In this paper, we propose two authentication an...
We present the design and analysis of the first fully expressive, iterative combinatorial exchange (ICE). The exchange incorporates a tree-based bidding language (TBBL) that is co...
Benjamin Lubin, Adam I. Juda, Ruggiero Cavallo, S&...