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» Exploiting Chaos for Computation
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ISCA
2012
IEEE
280views Hardware» more  ISCA 2012»
13 years 9 months ago
A case for random shortcut topologies for HPC interconnects
—As the scales of parallel applications and platforms increase the negative impact of communication latencies on performance becomes large. Fortunately, modern High Performance C...
Michihiro Koibuchi, Hiroki Matsutani, Hideharu Ama...
ISCA
2012
IEEE
242views Hardware» more  ISCA 2012»
13 years 9 months ago
Side-channel vulnerability factor: A metric for measuring information leakage
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
John Demme, Robert Martin, Adam Waksman, Simha Set...
DAC
2007
ACM
16 years 8 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
DAC
2006
ACM
16 years 8 months ago
Prototyping a fault-tolerant multiprocessor SoC with run-time fault recovery
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
Xinping Zhu, Wei Qin
EUROGRAPHICS
2010
Eurographics
16 years 3 months ago
Tetrahedral Embedded Boundary Methods for Accurate and Flexible Adaptive Fluids
When simulating fluids, tetrahedral methods provide flexibility and ease of adaptivity that Cartesian grids find difficult to match. However, this approach has so far been lim...
Christopher Batty, Stefan Xenos, Ben Houston