5675 search results - page 988 / 1135 » Exploiting Chaos for Computation |
334
Voted
PADL
2009
Springer
16 years 7 months ago
2009
Springer
This paper proposes a declarative description of user interfaces that s from low-level implementation details. In particular, the user interfaces specified in our framework are exe...
189
Voted
CHI
2009
ACM
16 years 7 months ago
2009
ACM
Although existing work has explored both information extraction and community content creation, most research has focused on them in isolation. In contrast, we see the greatest le...
205
Voted
HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
208
Voted
HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
173
Voted
HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...