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ICPP
2009
IEEE
16 years 1 months ago
Code Semantic-Aware Runahead Threads
Memory-intensive threads can hoard shared resources without making progress on a multithreading processor (SMT), thereby hindering the overall system performance. A recent promisi...
Tanausú Ramírez, Alex Pajuelo, Olive...
IPPS
2009
IEEE
16 years 1 months ago
Accelerating HMMer on FPGAs using systolic array based architecture
HMMer is a widely-used bioinformatics software package that uses profile HMMs (Hidden Markov Models) to model the primary structure consensus of a family of protein or nucleic aci...
Yanteng Sun, Peng Li, Guochang Gu, Yuan Wen, Yuan ...
IPPS
2009
IEEE
16 years 1 months ago
Annotation-based empirical performance tuning using Orio
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
Albert Hartono, Boyana Norris, Ponnuswamy Sadayapp...
ISCA
2009
IEEE
143views Hardware» more  ISCA 2009»
16 years 1 months ago
Spatio-temporal memory streaming
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...
Stephen Somogyi, Thomas F. Wenisch, Anastasia Aila...
DEXA
2009
Springer
127views Database» more  DEXA 2009»
16 years 1 months ago
The Real Performance Drivers behind XML Lock Protocols
Abstract. Fine-grained lock protocols should allow for highly concurrent transaction processing on XML document trees, which is addressed by the taDOM lock protocol family enabling...
Sebastian Bächle, Theo Härder