28 search results - page 1 / 6 » Exploiting Prediction to Reduce Power on Buses |
208
Voted
HPCA
2004
IEEE
16 years 8 months ago
2004
IEEE
We investigate coding techniques to reduce the energy consumed by on-chip buses in a microprocessor. We explore several simple coding schemes and simulate them using a modified Si...
180
Voted
HIPC
2003
Springer
16 years 26 days ago
2003
Springer
Power consumption becomes an important issue for modern processors. The off-chip buses consume considerable amount of total power [9,7]. One effective way to reduce power is to red...
171
Voted
ICCAD
1996
IEEE
15 years 12 months ago
1996
IEEE
Abstract -- Current day behavioral-synthesis techniques produce architectures that are power-inefficient in the interconnect. Experiments have demonstrated that in synthesized desi...
197
Voted
CASES
2003
ACM
16 years 28 days ago
2003
ACM
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
193
Voted
DATE
2002
IEEE
16 years 19 days ago
2002
IEEE
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...